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Gu - Building embedded systems: programmable hardware

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Gu Building embedded systems: programmable hardware
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The whole picture -- Power on and bootloader -- Inside the CPU -- RAM, DMA, and interrupt -- Bus architecture -- Firmware coding in C -- Firmware coding in the C++ and script languages -- Building and deployment -- Field-programmable gate arrays -- System on programmable chip (SOPC) -- De-Bounce, power management, and display -- Fixed point math -- Popular ways of console communications : prepare the tools -- Work flow.

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Changyi Gu 2016
Changyi Gu Building Embedded Systems 10.1007/978-1-4842-1919-5_1
1. The Whole Picture
Changyi Gu 1
(1)
San Diego, California, USA
Electronic supplementary material
The online version of this chapter (doi: 10.1007/978-1-4842-1919-5_1 ) contains supplementary material, which is available to authorized users.
A complex system that works is invariably found to have evolved from a simple system that worked.
John Gall (Ref [])
The world of embedded systems is pretty much a farrago of everything, with each system having its own idiosyncrasies. In the old days, many systems would forgo microprocessors in favor of glue logic or application specific controllers to drive costs down. This makes it very hard to have a generalized discussion about those systems.
However, things have changed since then. The past 20 years witnessed the relentless push of semiconductor processes. In the mid-1990s, 0.35m (350nm) was considered the state of the art. And when this book was being conceived, 14nm FinFET had just begun mass production. Big Fabs like Intel, TSMC, and Samsung are elbowing their way toward 10nm. The juggernaut of semiconductor technology has greatly shaped the landscape of embedded systems in the following ways:
  • The microprocessors clock rate has increased exponentially while its power consumption dropped. Thanks to its high production volume, unit price has also plummeted. Thus microprocessors have managed to gain the universal presence in todays embedded systems.
  • However, the sophistication of the semiconductor process has also boosted the NRE (Non-Recurring Engineering ) costs dramatically. And the high NRE costs have to be balanced out by high volumes in order to make the ends meet. This makes the chip tape-out riskier and less affordable. Consequently, for products with small- to mid-range volumes, programmable logic devices, such as FPGA, become more and more favorable over ASIC.
  • For the semiconductor process, shrinking feature size means higher density, which makes it possible for processors and programmable logic to be integrated on the same die. Major FPGA vendors now all have programmable SoC (System on Chip) devices in their portfolios to target various market segments. And when this book was being conceived, Intel has just acquired Altera for more than $16 billion to improve chip performance with programmable logic devices.
As a result, the traditional boundary between software and hardware has started to blur. For embedded systems practitioners, cross-disciplinary knowledge and skills are increasingly valued. Having that in mind, this book will try to cover both grounds with a practical approach.
As stated previously, thanks to the ferocious push of semiconductor technology, its no longer the luxury of high-end design to have a microprocessor on board. The prevailing truth is that nowadays the majority of embedded systems have at least one microprocessor on board, and they share many common traits in this regard. Assuming the system under discussion is a uni-processor system, its general architecture can be aptly illustrated in Figure .
Figure 1-1 General architecture of a uni-processor system A few notes about - photo 1
Figure 1-1.
General architecture of a uni-processor system
A few notes about the image in Figure :
  • Keep in mind that due to the high density of todays semiconductor process , the majority of the components shown in Figure could be integrated in the same package instead of being multiple discrete components on board.
  • Many technical details are omitted from Figure in order not to distract readers from the whole picture. Those technical details are covered in later chapters when the correspondent modules are mentioned.
  • The system bus in Figure could be AMBA (if it is a SoC design with ARM CPU core), PCI, PCI-express, or any other bus architecture.
  • Figure also assumes there is a VIC (Vector Interrupt Controller ) in the system, although this is not always the case. The topic of interrupt controllers is covered in later chapters.
  • As mentioned, programmable logic has started to gain traction as the NRE cost of ASIC has skyrocketed. Although not every system has FPGA or CPLD, FPGA/CPLD devices will be a valuable asset to extend system functions. In fact, todays FPGA is so resourceful that it could either absorb the microprocessor into its programming logic as a soft core (Ref []). Given all that, a great amount of ink will be spilled on FPGA/CPLD later in this book.
  • This book does not explicitly distinguish among microprocessor, processor, CPU and CPU core, since their differences are insignificant for all practical purposes. Thus the rest of the book will use those terms interchangeably. However, this book does make a distinction between the term microprocessor and microcontroller, as the former only refers to the processor core, while the latter usually means the processor core plus RAM/ROM and other peripherals in a single package.
Organization of the Book
The rest of the book will be organized as follows:
  • Chapters will illustrate how things work behind the scenes, starting from the moment when the power switch is flipped on.
  • Afterward, two chapters will discuss embedded software (firmware) programming, with one chapter covering C language and the other covering C++. There is also a chapter on firmware build and deployment.
  • SOPC/FPGA is an import topic of this book. Chapter will start on FPGA development, followed by another chapter on the SOPC design approach.
  • Other miscellaneous hardware topics, such as power management and LCD display, are discussed in Chapter .
  • Math is always the necessary evilplease excuse me for the lack of better wordsfor engineers. A whole chapter will be devoted to fixed-point math.
  • What sets human beings apart from other species is that we know how to use tools. Thus a separate chapter covers tool preparation.
  • Consistency and reliability are highly valued in any engineering effort. A discussion on workflow helps to conclude this book.
Companion Materials for this Book
Companion materials, such as sample code, supporting scripts, etc., will be released as open source material. You may get them on the Apress web site ( http://www.apress.com ) or through http://open.pulserain.com (link to GitHub).
References
SystematicsHow Systems Work and Especially How They Fail, by John Gall, Quadrangle/The New York Times Book Co., 1977
Nios II Gen2 Processor Reference Guide, Altera Corporation, April, 2015
Zynq-7000 All Programmable SoC: Embedded Design Tutorial, UG1165 (v2015.1), Xilinx Inc. April, 2015
SmartFusion Customizable System-on-Chip (cSoC) Rev 13, Microsemi Corporation, March 2015
Footnotes
Altera offers HPS (Hard Processor System) in almost all of its high end products. Xilinx has Zynq serial SoC FPGA. Microsemi provides SmartFusion serial SoC FPGA.
Changyi Gu 2016
Changyi Gu Building Embedded Systems 10.1007/978-1-4842-1919-5_2
2. Power On and Bootloader
Changyi Gu 1
(1)
San Diego, California, USA
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