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Prabhat Mishra - Network-on-Chip Security and Privacy

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Prabhat Mishra Network-on-Chip Security and Privacy

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This book provides comprehensive coverage of Network-on-Chip (NoC) security vulnerabilities and state-of-the-art countermeasures, with contributions from System-on-Chip (SoC) designers, academic researchers and hardware security experts. Readers will gain a clear understanding of the existing security solutions for on-chip communication architectures and how they can be utilized effectively to design secure and trustworthy systems.

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Book cover of Network-on-Chip Security and Privacy Editors Prabhat Mishra - photo 1
Book cover of Network-on-Chip Security and Privacy
Editors
Prabhat Mishra and Subodha Charles
Network-on-Chip Security and Privacy
1st ed. 2021
Logo of the publisher Editors Prabhat Mishra University of Florida - photo 2
Logo of the publisher
Editors
Prabhat Mishra
University of Florida, Gainesville, FL, USA
Subodha Charles
University of Moratuwa, Colombo, Sri Lanka
ISBN 978-3-030-69130-1 e-ISBN 978-3-030-69131-8
https://doi.org/10.1007/978-3-030-69131-8
The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerland AG 2021
This work is subject to copyright. All rights are solely and exclusively licensed by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed.
The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use.
The publisher, the authors and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, expressed or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

This Springer imprint is published by the registered company Springer Nature Switzerland AG

The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland

Preface

System-on-Chip (SoC) integrates a wide variety of hardware components into a single integrated circuit to provide the backbone of modern computing systems ranging from complex navigation systems in airplanes to simple Internet-of-Things (IoT) devices in smart homes. Cars are full of them, as are airplanes, satellites, and advanced military and medical devices. As applications grow increasingly complex, so do the complexities of the SoCs. For example, a typical automotive SoC may include 100200 diverse components (e.g., processor, memory, controllers, and converters) from multiple third-party vendors. Network-on-Chip (NoC) is a widely used solution for on-chip communication between various components in complex SoCs.

SoCs are designed today using Intellectual Property (IP) components to reduce cost while meeting aggressive time-to-market constraints. Growing reliance on these pre-verified components, often gathered from untrusted third-party vendors, severely affects the security and trustworthiness of SoC computing platforms. These third-party components may come with deliberate malicious implants to incorporate undesired functionality, undocumented test/debug interfaces working as a hidden backdoor, or other integrity issues. Since NoC facilitates communication between various components in an SoC, NoC is the ideal place for any malicious implants (such as hardware Trojans) to hide and launch a wide variety of security attacks. Due to the resource-constrained nature of many embedded and IoT devices, it may not be possible to employ traditional security solutions to protect NoC against malicious attacks. Specifically, there is a need for lightweight countermeasures that can secure NoC without violating any design constraints such as area, power, energy, and performance.

This book provides a comprehensive overview of NoC security attacks and effective countermeasures for designing secure and trustworthy on-chip communication architectures. These techniques are applicable across on-chip communication technologies (e.g., electrical, optical, and wireless) supporting a wide variety of on-chip network topologies (e.g., point-to-point, bus, crossbar, ring, and mesh). Specifically, this book describes state-of-the-art security solutions that satisfy a wide variety of communication (often conflicting) requirements such as securing packets, ensuring route privacy, meeting energy budget and real-time constraints, finding trusted routes in the presence of malicious components, and providing real-time attack detection and mitigation techniques. The presentation of topics has been divided into five categories with each category focusing on a specific aspect of the big picture. A brief outline of the book is provided as follows:
  1. Introduction to NoC Security: The first part of the book includes three introductory chapters on NoC design and security challenges.
    • Chapter provides an overview of NoC-based SoC design methodology with an emphasis on NoC architectures and security vulnerabilities.

    • Chapter describes accurate modeling and design space exploration of on-chip communication architectures.

    • Chapter presents popular optimization techniques for designing energy-efficient NoC architectures.

  2. Design-for-Security Solutions: The second part of the book focuses on design-time solutions for securing NoC architectures against attacks.
    • Chapter presents a lightweight encryption scheme using incremental cryptography.

    • Chapter describes a trust-aware routing algorithm that can bypass malicious components.

    • Chapter outlines a lightweight anonymous routing technique.

    • Chapter describes how to efficiently integrate secure cryptography to overcome NoC-based attacks.

  3. Runtime Security Monitoring: The third part of the book deals with security solutions for runtime detection and mitigation of vulnerabilities.
    • Chapter describes a mechanism for real-time detection and localization of denial-of-service attacks.

    • Chapter utilizes digital watermarking for providing lightweight defense against eavesdropping attacks.

    • Chapter outlines a machine learning framework for detecting attacks on NoC-based SoCs.

    • Chapter presents a routing technique that can provide trusted communication in the presence of hardware Trojans.

  4. NoC Validation and Verification: The fourth part of the book explores methods for verifying both functional correctness and security guarantees.
    • Chapter describes NoC security and trust validation techniques.

    • Chapter presents post-silicon validation and debug of NoCs.

    • Chapter describes challenges in designing reliable NoC architectures.

  5. Emerging NoC Technologies: The fifth part of the book surveys security implications in emerging NoC technologies.
    • Chapter describes security solutions for photonic (optical) NoCs.

    • Chapter presents security solutions for on-chip wireless networks.

    • Chapter provides an overview of securing 3D NoCs from hardware Trojan attacks.

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