Satyanarayana Vollala - Energy-Efficient Modular Exponential Techniques for Public-Key Cryptography: Efficient Modular Exponential Techniques

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Security is a major concern in data communication. Various cryptographic protocols are used for system security. Both software and hardware implementations of these protocols exist. As compared to software implementations, hardware realization of cryptographic algorithms ensures a higher level of security without a tradeoff in performance. Public-key cryptography is an important tool used for maintaining secrecy and to provide a digital signature. The security of public-key cryptography mainly depends on the complexity of solving the integer factorization problem and the discrete logarithmic problem. The core operations of public-key cryptography are modular exponentiation and modular multiplication. Hence, the performance of any public-key cryptography is primarily determined by the efficient implementation of these two operations. In order to optimize the time requirements of the public-key cryptographic transformations, it is essential to develop algorithms which minimize the number of modular multiplications. These algorithms also have to reduce the time required for a single modular multiplication in modular exponentiation.

This book discusses the algorithms for optimizing the time requirements of public-key cryptographic transformations. Specifically, it covers various methods to evaluate modular multiplication based on the Montgomery method. It also discusses the energy-efficient modular exponential techniques for public-key cryptography. To enhance the throughput of RSA public-key cryptography further in terms of the number of encryptions/decryptions per unit time, single-core demands for higher frequency results in the consumption of more power and dissipation of more heat. A Dual-core RSA processor with a hardware scheduler has been discussed for performing concurrent cryptographic transformations to attain better throughput without increasing the frequency.

Phenomenal demands for all kind of real-time e-commerce transactions and internet usage insist security as an essential part for protecting sensitive data. Many organizations use cryptographic techniques for achieving system security. The cryptographic techniques can be classified into two types, symmetric (secret) key cryptography and asymmetric (public) key cryptography. Among these two cryptographic systems, the public-key cryptographic system has been widely employed as it minimizes the need for a secure channel to exchange secret information. These techniques can be realized both in software as well as in hardware. But the hardware implementation will be an optimal choice for its performance and also assures a higher level of security.

This monograph discusses the various ways to implement the modular multiplication and modular exponential techniques. Modular exponentiation is the series of modular multiplications and modular multiplication involves the trial divisions. Hardware realization of modular multiplication is difficult as it involves the trial divisions. The techniques for optimizing the time vital operations of public-key cryptography are discussed in this monograph. It also discusses exploiting the multi-core domain for implementing modular exponentiation in two cores resulting in an enhanced throughput.

This book would not have been possible without the help and cooperation of many people who helped me directly and indirectly during my work.

First and foremost, we would like to express our sincere and deep gratitude to Dr. P. K. Sinha, Director and Vice-Chancellor, IIIT-Naya Raipur and Dr. Mini Shaji Thomas, Director, NIT, Tiruchirappalli for their enthusiastic and constant support to perform our research activities.

We thank the Department of Science and Technology (A department within the Ministry of Science and Technology in India) for their financial support for the execution of the project entitled Energy Efficient implementation of Multi-modular Exponential techniques for Public-Key Cryptosystems under Integrated Cyber Physical Systems.

We would like to thank Dr. A. Raghunathan, Additional General Manager, HRDC, BHEL-Tiruchirappalli and Dr. S. Venkatraman, Scientist H, ISRO, Hyderabad for their encouragement and constructive input at various stages of our research work. I must also thank Dr. R. Mahapatra, Dr. Ruhul Amin, Dr. U. Venkanna, Mr. Varadhan V. V., Dr. Shameedha Begum, and Mr. Amit D. Joshi who have given me worthwhile suggestions and for providing quality technical inputs during the research work.

We would like to express our gratitude to our family members for their constant support and patient understanding. All our fulfillments have been not possible without the support of our family. Finally, we cannot forget to thank the almighty for making me stronger and perseverance in difficult situations and bestowed blessings on us.