Larry D. Smith - Principles of Power Integrity for PDN Design - Simplified
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Larry D. Smith
Eric Bogatin
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Library of Congress Control Number: 2017930426
Copyright 2017 Pearson Education, Inc.
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ISBN-13: 978-0-13-273555-1
ISBN-10: 0-13-273555-5
1 17
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The creation of this book took more than the 5,000 person-hours of writing, simulating, and editing and more than 500 hours of conference calls. We could not have done this without the unfailing support and confidence from our wives, Susan and Marty, who kept the faith and gave us encouragement even during the long hours of writing, rewriting, and more rewriting.
Larry would also like to dedicate this book to his father, who was his undergrad Professor of Electrical Engineering.
Power integrity is a confusing topic in the electronics industrypartly because it is not well-defined and can encompass a wide range of problems, each with their own set of root causes and solutions. There is universal agreement that the field of power integrity includes everything from the voltage regulator module (VRM) to the on-die core power rails and on-die capacitance.
Between the VRM and die are interconnects on the package and board, which often carry discrete capacitors with their associated mounting inductance. The power distribution network (PDN) refers to all interconnects (usually inductive), the intentional energy storage devices (usually capacitive), and loss mechanisms (damping) between the VRM and the on-die Vdd-Vss power rails.
Power integrity is all about the quality of the power seen by the circuits on the die. What about noise created on the board power and ground planes by signals passing through cavities? Is this a signal integrity problem or a power integrity problem? Is the voltage noise generated by I/O switching currents and seen by the on-die Vcc and Vss rails a power integrity or signal integrity problem? Current that comes in through the common package lead inductance, which is ultimately connected to the VRM, generates this noise, which is sometimes referred to as switching noise or ground bounce.
This gray area between signal and power integrity has a profound impact on solutions that are offered for power integrity problems. Adding decoupling capacitors on the board often provide a solution for reducing Vdd core noise but seldom improve the cavity noise induced by high bandwidth signals. In general, board-level capacitors offer little or no improvement to return-plane bounce noise. In some cases, the parallel resonances they create can actually increase the cavity-to-signal cross talk.
The first step to solving a problem is to clearly identify the problem and then correctly identify its root cause. A well-defined problem is often only a few steps away from a solution. Efficient solutions to problems are developed based on the actual root cause.
This book focuses on the specific power integrity problems related to noise on the Vdd rail, which powers the on-die core logic and enables it to perform functions. The gates powered by the on-die Vdd rail switch signals that communicate to other gates on the same die, and do not necessarily travel off die as I/O. Transient current caused by core activity causes noise on the Vdd rail, which is sometimes referred to as self-aggression. The principles, analysis methods, and recommended best design practices to minimize this problem can also apply to other signal integrity, power integrity, and EMI problems; however, the focus in this book is on self-aggression of the Vdd rail.
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