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Thomas Dillinger - VLSI Design Methodology Development

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Thomas Dillinger VLSI Design Methodology Development
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The Complete, Modern Tutorial on Practical VLSI Chip Design, Validation, and Analysis
As microelectronics engineers design complex chips using existing circuit libraries, they must ensure correct logical, physical, and electrical properties, and prepare for reliable foundry fabrication. VLSI Design Methodology Development focuses on the design and analysis steps needed to perform these tasks and successfully complete a modern chip design.Microprocessor design authority Tom Dillinger carefully introduces core concepts, and then guides engineers through modeling, functional design validation, design implementation, electrical analysis, and release to manufacturing. Writing from the engineers perspective, he covers underlying EDA tool algorithms, flows, criteria for assessing project status, and key tradeoffs and interdependencies. This fresh and accessible tutorial will be valuable to all VLSI system designers, senior undergraduate or graduate students of microelectronics design, and companies offering internal courses for engineers at all levels.
  • Reflect complexity, cost, resources, and schedules in planning a chip design project
  • Perform hierarchical design decomposition, floorplanning, and physical integration, addressing DFT, DFM, and DFY requirements
  • Model functionality and behavior, validate designs, and verify formal equivalency
  • Apply EDA tools for logic synthesis, placement, and routing
  • Analyze timing, noise, power, and electrical issues
  • Prepare for manufacturing release and bring-up, from mastering ECOs to qualification
This guide is for all VLSI system designers, senior undergraduate or graduate students of microelectronics design, and companies offering internal courses for engineers at all levels. It is applicable to engineering teams undertaking new projects and migrating existing designs to new technologies.

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VLSI Design Methodology Development

Thomas Dillinger

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Library of Congress Control Number: 2019937605

Copyright 2019 Pearson Education, Inc.

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ISBN-13: 978-0-13-573241-0

ISBN-10: 0-13-573241-7

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Preface

This book describes the steps associated with the design and verification of Very Large Scale Integration (VLSI) integrated circuits, collectively denoted as the design methodology. The focus of the text is to describe the key features and requirements of each step in the VLSI methodology. The execution of each step utilizes electronic design automation (EDA) software tools, which are invoked by a script that manages the design configuration, assembles the input data, allocates the IT job resources, and interprets the output results. The script is commonly referred to as the flow for the specific methodology step. This book covers both the underlying EDA tool algorithms applied and the characteristics of the related flow. Specific attention is given to the criteria used to assess the status of a design project as it progresses toward the release to fabrication.

The audience for the text is senior-level undergraduates and first-year graduate students studying microelectronics. Professional engineers will also likely find topics of interest to expand the breadth of their expertise. In many cases, the discussion of a specific step extends beyond the design engineering considerations to include the perspective of a project manager, a design automation engineer, a fabrication technology support engineer, and, to be sure, a member of the project methodology team.

It has been my experience that graduating engineers pursuing microelectronic hardware design would benefit from broad exposure to all facets of a VLSI design project and an understanding of the interdependencies between the various engineering teams. The goal of this book is to provide a comprehensive discussion of a VLSI design methodology at a level of technical detail appropriate for a two-semester, project-oriented course of study.

The book is targeted toward a discussion style of presentation rather than formal lectures. The text often highlights the trade-offs that are evaluated when selecting a specific approach for a design methodology step. An interactive discussion among the students provides an opportunity comparable to the engineering environment as part of a design team.

There are no chapter problems provided in this book. However, many universities participate in EDA vendor programs that provide access to individual software tools. This text would work extremely well in combination with such a program. After reviewing a step as a constituent of the overall design methodology, students would be able to exercise the corresponding EDA tool. Projects of larger scope could be incorporated to align with individual student interestsincluding flow scripting, pursuing power/performance/area evaluations, designing (cell-based) circuits, and developing methodology policies and the software utilities to verify those design standards. Projects would typically culminate in a final presentation to the class.

The text is divided into six major topics.. This repetition reflects the importance of the ECO methodology for a design project. Another example is the pervasive impact of lithographic multipatterning in advanced fabrication process nodes. The decomposition of the design data for a mask layer into (individually resolvable) subsets needs methodology support throughout design implementation, analysis, and physical verification flows. The influence of multipatterning is therefore described in multiple chapters.

The references provided with each chapter are rather sparse and in no way reflect the exceptional research that has enabled the complexity of current VLSI designs. The references listed are often among the landmark papers in their specific disciplines. A search for the technical papers that have recently cited these references will enable the reader to develop a more comprehensive bibliography. The website http://www.vlsidesignmethodology.com provides links to errata and additional technical publications of interest.

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