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Dolecek - Advances in Multirate Systems

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Dolecek Advances in Multirate Systems
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This book offers readers a single-source reference to the implementation aspects of multirate systems, advances in design of comb decimation filters and multirate filter banks. The authors describe a variety of the most recent applications in fields such as, image and video processing, digital communications, software and cognitive radio. Offers a general overview of the fundamental operations and various applications of multirate systems; Enables readers to design systems with enhanced computational efficiency; Provides a view of the state of the art in a wide range of applications from wireless communication systems to image signal processing, including high performance video, software and cognitive radio.;Chapter1: Implementation Studies Of Multirate Systems -- Chapter2: Advances In Multirate Filter Banks: A Research Survey -- Chapter3: Methods For Improving Magnitude Characteristic Of Comb Decimation Filters -- Chapter4: Design Of Multichannel Filterbank Using Minor Component Analysis And Fractional Derivative Constraints -- Chapter5: Multiresolution Filter Banks For Pansharpening Application -- Chapter6: Video Signal Processing -- Chapter7: Multirate Systems In Cognitive Radio -- Chapter8: Design Of Non-Uniform Linear Phase Transmultiplexer For Communications.

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Springer International Publishing AG 2018
Gordana Jovanovic Dolecek (ed.) Advances in Multirate Systems
Implementation Studies of Multi-rate Systems
Yanxiang Huang 1, 2 and Chunshu Li 3
(1)
IMEC, Heverlee, Belgium
(2)
KU Leuven, Leuven, Belgium
(3)
Marvell, Santa Clara, CA, USA
Chunshu Li
Email:
Keywords
Signal processing Multi-rate filter Digital front-end Filter architecture Wireless communication
Introduction
This chapter discusses the implementation aspects of the advance in multi-rate signal processing. Two case studies of the multi-rate filters are presented: the first is the up-sampling filter for wireless transmitters, and the second is the down-sampling filter for receivers. The design challenge for the first up-sampling case is the ultimate high speed, since the data rate is very high. Therefore, in this case study, an important consideration is the relative sequence of different functionalities to ensure system requirements. The coexistence with other functionalities is also discussed, since they have cross effects on each other. For the second case, the design challenge is the wide frequency coverage. The focus of discussion is the filter architecture selection to meet a good trade-off of power consumption and area.
With the aggressive scaling of CMOS technology , the area utilization and power consumption of digital circuit are dropping rapidly. Therefore, more and more signal processing that was previously realized in the analog domain is now migrated to the digital domain. The most notable applications for multi-rate signal processing are up-sampling and down-sampling. Reducing the sampling rate requires an anti-aliasing filter prior to the decimation to a lower sampling rate. Increasing the sampling rate, on the other hand, also requires an anti-imaging filter after the interpolation. These two filters are specified using the original low-pass filter specification. To achieve any gain in computational efficiency, the two filters must run at the reduced sampling rates.
These up-sampling and down-sampling functionalities are realized by FIR (finite impulse response) filters. For an FIR filter, let x [ n ] be the discrete input, and c i be the FIR coefficient; the output y [ n ] are computed as
This computation is also known as discrete convolution Figure structure b - photo 1
This computation is also known as discrete convolution.
Figure structure (b) and (c)) perform the filtering after the down-sampler.
Fig 1 FIR filter implementations This chapter illustrates the design - photo 2
Fig. 1
FIR filter implementations
This chapter illustrates the design methodology with two case study filters. The first multi-rate filter case is the up-sampling filter used for polar transmitters, which exploits the mm-wave frequency band. The 60 GHz mm-wave frequency band provides as wide as 7 GHz unlicensed bandwidth. The design challenge is the ultimate high speed, as the bandwidth and hence the sample rate is very high. This case study focuses on the high-level design aspects of the multi-rate system, for instance, the relative configuration of the up-sampling filter and order of the up-sampling filter with regard to other functionalities.
The second multi-rate filter case is the down-sampling filter for multi-standard radio receivers. The receiver supports HD Radio, DAB Radio, and DVB-T. The digital down-sampling decimation filter provides flexibility in those standards. The design challenge is the wide-frequency coverage, i.e., the input is as high as 4.096 Gsps and the output is as low as 1 Msps. Therefore, in this section, the emphasis is on the implementation details of the decimation down-sampling filter itself. For this design, the high-speed filters favor multiplier-less FIR filter to meet timing, and the low-speed filters employ one or few multipliers to perform all the FIR multiplications in sequence to save area cost.
Up-sampling System for Polar Transmitters
There is ample license-free bandwidth around the 60 GHz frequency (Fig. ], phased array antennas are typically employed. This will drastically increase the power consumption.
Fig 2 Ample license-free bandwidth around 60 GHz Improving the power - photo 3
Fig. 2
Ample license-free bandwidth around 60 GHz
Improving the power efficiency of PA is critical in reducing the power cost of mm-wave transmitter . Most 60 GHz PAs operate in the class A linear mode [], due to the use of variable envelope modulations that are required for high data rates and high spectral efficiency. This causes the typical PA power efficiency of less than 5%.
In order to improve the PA power efficiency, the PA needs to work in its nonlinear region to utilize the peak efficiency. The polar architecture is one interesting solution that allows the PA to operate in saturation. In the polar transmission, the PH (phase) signal goes to the PA, while the AM (amplitude) is applied to the PA through a separate modulation path and combined with PH signal by modulating the supply.
Previously, the modulation and processing are mainly realized by analog circuits, mainly due to the high-speed requirement that is too costly for digital circuits. However, there are three design challenges for those analog-centric designs :
  1. AMAM distortion: the PA is subject to the effects of the supply voltage on linearity []. For CMOS devices, voltage gain is usually a strong function of the drain-source potential, which leads to PA gain changing with supply voltage. This contributes to the AMAM distortion. Voltage-dependent capacitances in active devices exhibit high nonlinearity. The supply voltage can change the bias conditions on these capacitances, resulting in PH shift dependent on the overall output impedance, causing AMPM distortion.
  2. PA nonlinearity: the second concerns the linearity of the envelope detector. Precise reconstruction of the envelope signal is vital for the performance of polar transmitters. However, the analog envelope detector suffers from circuits nonlinear behavior and produces spectral regrowth.
  3. AMPM distortion: the PA exhibits a phase shift that depends on the input amplitude of limiters at high frequencies. The phase shift increases as the input amplitude decreases using the analog limiter for constant envelope signal generation, which will distort the transmitted signal depending on the input signals amplitude.
In recent years, due to the advance in digital CMOS scaling, more previously analog-dominated circuits are transformed into the digital-centric methodology. This also applies to the polar transmitter for mm-wave communication system.
For digital-intensive polar transmitters , the polar concept is expanded to the whole transmitter, rather than only in the RF domain []. The polar conversion is performed with digital signal processing. The AM signal can then digitally modulate a variable-size PA. This avoids modulating the supply and also eliminates the need for an additional RF limiter and AM detection circuits, which would introduce extra nonlinearity and bandwidth limitations.
Although the digital polar transmitter has many advantages, the design challenges on DSP (digital signal processing) front end need to be analyzed and tackled. For the 60 GHz application, the DSP usually works at a very high speed depending on the required oversampling factor. This complicates the timing closure and increases the power consumption.
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