Botros - HDL with digital design VHDL and Verilog

HDL W ITH
D IGITAL D ESIGN
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D IGITAL D ESIGNVHDL AND VERILOG Nazeih Botros Copyright 2015 by M ERCURY L EARNING AND I NFORMATION LLC. This publication, portions of it, or any accompanying software may not be reproduced in any way, stored in a retrieval system of any type, or transmitted by any means, media, electronic displayor mechanical display, including, but not limited to, photocopy, recording, Internet postings, or scanning, without prior permission in writing from the publisher. Publisher: David Pallai
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1-800-758-3756 Nazeih Botros. HDL with Digital Design:VHDL and Verilog
ISBN: 978-1-938549-81-6 The publisher recognizes and respects all marks used by companies, manufacturers, and developers as a means to distinguish their products. HDL with Digital Design:VHDL and Verilog
ISBN: 978-1-938549-81-6 The publisher recognizes and respects all marks used by companies, manufacturers, and developers as a means to distinguish their products.

All brand names and product names mentioned in this book are trademarks or service marks of their respective companies. Any omission or misuse (of any kind) of service marks or trademarks, etc. is not an attempt to infringe on the property of others. Library of Congress Control Number: 2014950125 151617321 This book is printed on acid-free paper. Our titles are available for adoption, license, or bulk purchase by institutions, corporations, etc. at 800-232-0223(toll free). at 800-232-0223(toll free).

All of our titles are available in digital format at authorcloudware.com and other digital vendors. Companion files (figures and code listings) for this title are available by contacting info@merclearning.com. The sole obligation of M ERCURY L EARNING AND I NFORMATION to the purchaser is to replace the disc, based on defective materials or faulty workmanship, but not based on the operation or functionality of the product. This book provides the basic knowledge necessary to understand how to design and analyze basic digital logic systems and to know how to simulate these systems using hardware description languages. Systems here include digital logic circuits such as: adders, multiplexers, decoders, multipliers, flip-flops, latches, counters, sequential state machines, cache memories, and basic computers, simplified biological mechanisms that describe the operation of organs such as kidney, mathematical models (e.g., factorial, greatest of N numbers, multiplication algorithms, polynomials), and artificial intelligence (e.g., artificial neural networks). The book covers, in detail, Very High Speed Integrated Circuit Hardware Description Language (VHDL) and Verilog HDL.

The book also covers a very important tool in writing the HDL code, the mixed language description where both VHDL and Verilog constructs are implemented in one HDL program. It also covers fundamentals of hardware synthesis. The book classifies the HDL styles of writing into six groups: data flow, behavioral, structural or gate-level, switch-level, mixed-type, and mixed language description. Book Organization The following is a brief description of the subjects that are covered in each chapter. Chapter 1: Covers structure of the HDL module, operators including logical, arithmetic, relational and shift, data types such as scalar, composite and file, and a brief comparison between VHDL and Verilog. The chapter also covers how to simulate and test HDL code using test benches Chapter 2: Covers: a) Analysis and design of combinational circuits such as adders, subtractors, decoders, multiplexers, comparators and simple multipliers, and sequential circuits such as latches; b) Simulation of the above combinational and sequential circuits using VHDL and Verilog data-flow description.

The description includes covering of logical operators, concurrent signal-assignment statements, time delays, and vectors. Chapter 3: Covers: a) Analysis and design of sequential circuits such as D flip-flop, JK flip-flop, T flip-flop, binary counters, and shift register; b) Understand the concept of some basic genetic and renal systems; c) Implementation of Booth algorithm; d) Simulation of the systems in (a), (b), and (c) using VHDL and Verilog behavioral description. The description includes covering of the sequential statements if, case, loop casex, casez, when, report, $display, wait, loop, exit, next, always, repeat, forever, and initial. Chapter 4: Covers: a) Analysis and design of sequential state machines; b) Analysis and design of adders, multiplexers, decoders, comparators, encoders, latches, flip-flops, counters, shift registers, and memory cells; c) Simulation of the systems in (a) and (b) using VHDL and Verilog structural description including the statements: component, use, and, or, not, xor, nor,