Digital Design
With an Introduction to the Verilog HDL, VHDL, and SystemVerilog
Digital Design
With an Introduction to the Verilog HDL, VHDL, and SystemVerilog
S ixth E dition
M. Morris Mano
Emeritus Professor of Computer Engineering
California State University, Los Angeles
Michael D. Ciletti
Emeritus Professor of Electrical and Computer Engineering University of Colorado at Colorado Springs
330 Hudson Street, NY NY 10013
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Library of Congress Cataloging-in-Publication Data
Names: Mano, M. Morris, 1927- author. | Ciletti, Michael D., author.
Title: Digital design : with an introduction to the verilog HDL, VHDL, and
system Verilog / M. Morris Mano, Emeritus Professor of Computer
Engineering, California State University, Los Angeles, Michael D. Ciletti,
Emeritus Professor of Electrical and Computer Engineering, University of
Colorado at Colorado Springs.
Description: Sixth edition. | Upper Saddle River, New Jersey : Pearson
Education, Inc., [2017] | Includes index.
Identifiers: LCCN 2017004488 | ISBN 9780134549897 (print : alk. paper)
Subjects: LCSH: Electronic digital computersCircuits. | Logic circuits. |
Logic design. | Digital integrated circuits.
Classification: LCC TK7888.3 .M343 2017 | DDC 621.39/5dc23 LC record available at https://lccn.loc.gov/2017004488
ISBN 10: 0-13-454989-9
ISBN 13: 978-0-13-454989-7
Contents
Preface
The speed, density, and complexity of todays digital devices are made possible by advances in physical processing technology and digital design methodology. Aside from semiconductor technology, the design of leading-edge devices depends critically on hardware description languages (HDLs) and synthesis tools. Three public-domain languages, Verilog, VHDL, and SystemVerilog, all play a role in design flows for todays digital devices. HDLs, together with fundamental knowledge of digital logic circuits, provide an entry point to the world of digital design for students majoring in computer science, computer engineering, and electrical engineering.
In the not-too-distant past, it would be unthinkable for an electrical engineering student to graduate without having used an oscilloscope. Today, the needs of industry demand that undergraduate students become familiar with the use of at least one hardware description language. Their use of an HDL as a student will better prepare them to be productive members of a design team after they graduate.
Given the presence of three HDLs in the design arena, we have expanded our presentation of HDLs in Digital Design to treat Verilog and VHDL, and to provide an introduction to SystemVerilog. Our intent is not to require students to learn three, or even two, languages, but to provide the instructor with a choice between Verilog and VHDL while teaching a systematic methodology for design, regardless of the language, and an optional introduction to SystemVerilog. Certainly, Verilog and VHDL are widely used and taught, dominate the design space, and have common underlying concepts supporting combinational and sequential logic design, and both are essential to the synthesis of high-density integrated circuits. Our text offers parallel tracks of presentation of both languages, but allows concentration on a single language. The level of treatment of Verilog and VHDL is essentially equal, without emphasizing one language over the other. A language-neutral presentation of digital design is a common thread through the treatment of both languages. A large set of problems, which are stated in language-neutral terms, at the end of each chapter can be worked with either Verilog or VHDL.
The emphasis in our presentation is on digital design, with HDLs in a supporting role. Consequently, we present only those details of Verilog, VHDL, and SystemVerilog that are needed to support our treatment of an introduction to digital design. Moreover, although we present examples using each language, we identify and segregate the treatment of topics and examples so that the instructor can choose a path of presentation for a single languageeither Verilog or VHDL. Naturally, a path that emphasizes Verilog can conclude with SystemVerilog, but it can be skipped without compromising the objectives. The introduction to SystemVerilog is selectivewe present only topics and examples that are extensions of Verilog, and well within the scope of an introductory treatment. To be clear, we are not advocating simultaneous presentation of the languages. The instructor can choose either Verilog/SystemVerilog or VHDL as the core language supporting an introductory course in digital design. Regardless of the language, our focus is on digital design.
The language-based examples throughout the book are not just about the details of an HDL. We emphasize and demonstrate the modeling and verification of digital circuits having specified behavior.
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