Ageing of Integrated Circuits
Causes, Effects and Mitigation Techniques
Editor
Basel Halak
The School of Electronics and Computer Science, University of Southampton, Southampton, UK
ISBN 978-3-030-23780-6 e-ISBN 978-3-030-23781-3
https://doi.org/10.1007/978-3-030-23781-3
Springer Nature Switzerland AG 2020
This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed.
The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use.
The publisher, the authors, and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, express or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
This Springer imprint is published by the registered company Springer Nature Switzerland AG.
The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland
To
my parents
as well as
Suzanne, Hanin, and Sophia
with love
Preface
The ageing of an organism in biology is defined as a progressive, irreversible process that inevitably ends with death. The maximal lifetime of an individual is significantly affected by ageing. The same is true for integrated circuits wherein ageing can be caused by several physical mechanisms, including bias temperature instability (BTI), hot carrier injection (HCI), and time-dependent dielectric breakdown (TDDB).
Ageing effects lead to a degradation in the performance and reliability of an electronic system, hence limiting its expected lifetime.
Variation-aware design techniques, such as conservative safety margins, can be used to reduce the impact of ageing on system reliability; however, the applications of such methods make it harder to develop competitive products and may lead to the elimination of performance gains of technology scaling. Therefore, there is a need for innovative approaches to improve the resilience of integrated circuit to ageing-induced failure without affecting its performance.
The prime objective of this book is to provide a timely and coherent account of the latest advances in the key research areas of ICs ageing; it has been developed as a collaborative effort among several international research groups, each providing an up-to-date summary of their latest findings and highlighting the remaining challenges and research opportunities. To facilitate the understanding of the material, each chapter includes a background section explaining related terminologies and principles, in addition to a comprehensive list of relevant references. The book is divided into three parts to enhance its readability, namely, physical mechanisms, mitigation techniques, and monitoring and adaptation approaches.
The Contents at Glance
This book explains the physical mechanism causing the ageing of integrated circuits, including a comprehensive analysis of its effects on the performance and reliability of integrated circuits. Afterwards, the book presents a number of mitigation techniques that can be applied at different stages of the life cycle of silicon chips. At the design stage, the book presents a synthesis algorithm that help produce ageing-resilient digital systems; in addition, it explores a number of application-dependent methods to improve system reliability. The book also discusses the state-of-the-art approaches for predicting ageing-induced failures and associated design adaptation techniques. More details on each chapter are provided below:
Part I: Ageing Physical Mechanisms and Effects
Chapter provides a comprehensive review of the physical mechanisms causing the ageing of CMOS circuits.
Chapter provides a detailed analysis of the impact of ageing on the reliability and performance of integrated circuits.
Part II: Ageing Mitigation Techniques
Chapter presents an application-level solution to mitigate the impact of ageing on microprocessors using an anti-ageing software.
Chapter discusses the impact of ageing on SRAM memories and review different approaches to mitigate against such effects.
Chapter reviews the state-of-the-art techniques employed to enhance BTI lifetime reliability during digital synthesis.
Part III: Ageing Monitoring and Adaptation Techniques
Chapter discusses the latest techniques used in ageing monitoring, including monitor designs and on-chip insertion methods.
Chapter discusses the design of an ageing monitor to detect ageing-induced performance degradation in SRAM memories.
Chapter presents a new design for a multipath delay monitor that used to predict ageing-induced timing errors.
Book Audience
The book is intended to provide a comprehensive coverage of the latest research advances in the key research areas of integrated circuits ageing; this makes it a valuable resource for graduate students, researchers, and engineers working in these areas. I hope this book will complement the ongoing research and teaching activities in this field.
Basel Halak
Southampton, UK
March 2019
Acknowledgments
I would like to thank all of those who contributed to the emergence, creation, and correction of this book. First, I would like to thank my colleagues who have contributed chapters to this manuscript for taking the time to share their knowledge and for being very accommodating throughout the publication process. Special thanks go to the graduate students at Southampton, Grenoble, and Ioannina Universities for the many hours they have spent working in their labs to generate the experimental results. Of course, the book would not be successful without the contributions of many researches and expert in field of CMOS ageing.
Contents
Part I Ageing Physical Mechanisms and Effects
Domenik Helms
Daniele Rossi
Part II Ageing Mitigation Techniques
Haider Muhi Abbas , Mark Zwolinski and Basel Halak
Mohd Syafiq Mispan , Mark Zwolinski and Basel Halak
Shengyu Duan , Mark Zwolinski and Basel Halak
Part III Ageing Monitoring and Adaptation Techniques
Lorena Anghel , Florian Cacho and Riddhi Jitendrakumar Shah