Liliana Andrade - Multi-Processor System-On-Chip 2

To my parents, sisters and husband, the loves and pillars of my life.

Liliana ANDRADE

I express my profound gratitude to Karine, my parents and all my family, for their help and support throughout all these years.

Frdric ROUSSEAU

SCIENCES

Electronics Engineering, Field Director Francis Balestra

Design Methodologies and Architecture,
Subject Head Ahmed Jerraya

Coordinated by

Liliana Andrade

Frdric Rousseau

First published 2020 in Great Britain and the United States by ISTE Ltd and John Wiley & Sons, Inc.

Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms and licenses issued by the CLA. Enquiries concerning reproduction outside these terms should be sent to the publishers at the undermentioned address:

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John Wiley & Sons, Inc.

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ISTE Ltd 2020

The rights of Liliana Andrade and Frdric Rousseau to be identified as the authors of this work have been asserted by them in accordance with the Copyright, Designs and Patents Act 1988.

Library of Congress Control Number: 2020940076

British Library Cataloguing-in-Publication Data

A CIP record for this book is available from the British Library

ISBN 978-1-78945-022-4

ERC code:

PE6 Computer Science and Informatics

PE6_1 Computer architecture, pervasive computing, ubiquitous computing

PE6_10 Web and information systems, database systems, information retrieval and digital libraries, data fusion

PE7 Systems and Communication Engineering

PE7_2 Electrical engineering: power components and/or systems

Ahmed JERRAYA

Cyber Physical Systems Programs, CEATech, Grenoble, France

Multi-core and multi-processor SoC (MPSoC) concepts started in the late 1990s, mainly to mitigate the complexity of application-specific integrated circuits (ASICs) and to bring some flexibility. The integration of instruction-set processors into ASIC design aimed both to structure the architecture and to allow for programmability. The concept was adopted for general-purpose CPU and GPU in the second phase. Among the pioneers of MPSoC design, we can list the MPA architecture from ST that used eight specific cores to implement MPEG4 in 1998. This evolved 10 years later to give rise to MPPA, the Kalrays general-purpose MPSoC architecture. Another pioneer is the emotion engine from Sony that used five cores (two DSP and three RISC) to build the application processor for the PlayStation (PS2). This also evolved and later converged to bring the CELL architecture (developed jointly by Sony, IBM and Toshiba) in 2005. In 2000, Lucent announced Daytona (quad SPARC V8), and in 2001, Philips designed the famous Viper architecture that combined a MIPS architecture and a DSP (Trimedia). In 2004, TI introduced the OMAP architecture that combined an ARM and a DSP. Using MPSoC to build specific architectures is continuing, and almost every SoC produced today is a multi (or many) core architecture. An important evolution took place in 2005 with the ARM MPCore, the first general-purpose quad core. This was followed by several commercial, general-purpose multi-cores, including Intel Core Duo Pentium, AMD Opteron, Niagra Spark, the Cell processor (8 Cell cores + PowerPC, ring network).

MPSoC started a new computing era, but brought a twofold challenge: building multi-core HW that can be used easily by SW designers, and building distributed SW that fully exploits HW capabilities. To deal with these challenges, the design communities from Academia and Industry began a series of conferences and workshops to rethink classical distributed computing. The study of new methods, models and tools to deal with these new distributed HW and SW architectures generated new concepts, such as the interconnect architectures called network-on-chip (NoC). The MPSoC Forum, created in 2001, was the first interdisciplinary forum that brought together the leading thinkers from the different fields to design multi-core and multi-processor SoC. Over the last 20 years, MPSoC was a unique opportunity for me to meet so many of the worlds top researchers and to communicate with them in person, in addition to enjoying the high-quality conference programs. The confluence of academic and industrial perspectives, and hardware and software, makes MPSoC not yet another conference. I have learned how emerging SW and HW design technologies and architectures can benefit from advanced semiconductor manufacturing technologies to build energy-efficient multi-core architectures that can serve advanced computing (image, vision and cloud) and distributed networked systems. This book, in two volumes (Architectures and Applications), was published to celebrate the 20th anniversary of MPSoC with outstanding contributions from previous MPSoC events.

This first volume on architectures covers the key components of MPSoC: processors, memory, interconnect and interfaces.

Liliana ANDRADE and Frdric ROUSSEAU

Universit Grenoble Alpes, CNRS, Grenoble INP, TIMA, 38000 Grenoble, France

The editors are indebted to the MPSoC community who made this book possible. First of all, they acknowledge the societies that supported this project. EDAA and IEEE/CAS partially funded the organization of the first two events. Since its creation, IEEE/CEDA has sponsored the event. Industrial sponsors played a vital role in keeping MPSoC alive for the last 20 years; special thanks to Synopsys, Arteris, ARM, XILINX and Socionext. The event was created by a nucleus of several people who now form the steering committee (Ahmed Jerraya, Hannu Tenhunen, Marilyn Wolf, Masaharu Imai and Hiroto Yasuura). A larger group has, for the last 20 years, been working to form the community (Nicolas Ventroux, Jishen Zhao, Tsuyoshi Isshiki, Frdric Rousseau, Anca Molnos, Gabriela Nicolescu, Hiroyuki Tomiyama, Masaaki Kondo, Hiroki Matsutani, Tohru Ishihara, Pierre-Emmanuel Gaillardon, Yoshinori Takeuchi, Tom Becnel, Frdric Ptrot, Yuan Xie, Koji Inoue, Masaaki Kondo, Hideki Takase and Raphal David). The editors would like to acknowledge the outstanding contribution of the MPSoC speakers, and especially those who contributed to the chapters of this book. Finally, the editors would like to thank the people who participated in the careful reading of this book (Breytner Fernandez and Bruno Ferres).

Stefan A. DAMJANCEVIC

Vodafone Chair Mobile, Communications Systems, TU Dresden, Germany

Synopsys, Saint Petersburg, Russia

Solutions Group, Synopsys, Inc., Eindhoven, The Netherlands

Barkhausen Institut, TU Dresden, Germany

Over the past few decades, we have seen rapid innovation in wireless communications. In particular, the IEEE 802.11 and 3GPP standardization organizations have driven data rates into the