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Soonhoi Ha - Handbook of Hardware/Software Codesign

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Soonhoi Ha Handbook of Hardware/Software Codesign
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Part I
Introduction to Hardware/Software Codesign
Springer Science+Business Media Dordrecht 2017
Soonhoi Ha and Jrgen Teich (eds.) Handbook of Hardware/Software Codesign
1. Introduction to Hardware/Software Codesign
Soonhoi Ha 1
(1)
Department of Computer Science and Engineering, Seoul National University, Gwanak-ro 1, Gwanak-gu, Seoul, Korea
(2)
Department of Computer Science, Friedrich-Alexander-Universitt Erlangen-Nrnberg (FAU), Erlangen, Germany
(3)
Department of Computer Science and Electrical Engineering, Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Rostock, Germany
(4)
Institute of Embedded Systems/Real-Time Systems at Ulm University, Ulm, Germany
(5)
Department of Computer Science, School of Computing, National University of Singapore, Singapore, Singapore
(6)
Center for Embedded and Cyber-Physical Systems, Department of Electrical Engineering and Computer Science, The Henry Samueli School of Engineering, University of California, Irvine, CA, USA
(7)
Department of Computer and Information Science, Linkping University, SE-581 83 Linkping, Sweden
(8)
School of Computing, Informatics and Decision Systems Engineering, Arizona State University, 85287 Tempe, AZ, USA
(9)
Department of Electrical and Computer Engineering, The University of Texas at Austin, 78712 Austin, TX, USA
(10)
Department of Electrical and Computer Engineering and Institute for Advanced Computer Studies, University of Maryland, College Park, MD, USA
(11)
Department of Pervasive Computing, Tampere University of Technology, Tampere, Finland
Soonhoi Ha (Corresponding author)
Email:
Jrgen Teich
Email:
Christian Haubelt
Email:
Michael Gla
Email:
Tulika Mitra
Email:
Rainer Dmer
Email:
Petru Eles
Email:
Aviral Shrivastava
Email:
Andreas Gerstlauer
Email:
Shuvra S. Bhattacharyya
Email:
Abstract
Hardware/Software Codesign (HSCD) is an integral part of modern Electronic System Level (ESL) design flows. This chapter will review important aspects of hardware/software codesign flows, summarize the historical evolution of codesign techniques, and subsequently summarize each of its major branches of research and achievements that later will be presented in detail by different parts of this Handbook of Hardware/Software Codesign.
Acronyms
ASIC
Application-Specific Integrated Circuit
DES
Discrete Event Simulation
DSE
Design Space Exploration
EA
Evolutionary Algorithm
EDA
Electronic Design Automation
ESL
Electronic System Level
ForSyDe
Formal System Design
FSM
Finite-State Machine
GA
Genetic Algorithm
HSCD
Hardware/Software Codesign
HW
Hardware
ILP
Integer Linear Program
IP
Intellectual Property
ISA
Instruction-Set Architecture
KPN
Kahn Process Network
MARTE
Modeling and Analysis of Real-Time Embedded Systems
MoC
Model of Computation
MPSoC
Multi-Processor System-on-Chip
OOO PDES
Out-of-Order Parallel Discrete Event Simulation
OS
Operating System
PB
Pseudo-Boolean
PDES
Parallel Discrete Event Simulation
PN
Process Network
SDF
Synchronous Data Flow
SIMD
Single Instruction, Multiple Data
SLDL
System-Level Description Language
SoC
System-on-Chip
SW
Software
SysteMoC
SystemC Models of Computation
TLM
Transaction-Level Model
UML
Unified Modeling Language
VLIW
Very Long Instruction Word
VP
Virtual Prototype
WCET
Worst-Case Execution Time
1.1 Introduction
As the name implies, Hardware/Software Codesign (HSCD) denotes design methodologies for electronic systems that exploit the trade-offs and the synergy of Hardware (HW) and Software (SW). Typically, the application functionality is partitioned into software components that are running on the processor cores and hardware components that are used to accelerate some parts of the application or to provide interfaces to the environment. In the traditional design practice for such systems, software is usually designed after the hardware architecture is fixed as illustrated in Fig..
Fig 11 A traditional design flow of an electronic system The HW architecture - photo 1
Fig. 1.1
A traditional design flow of an electronic system. The HW architecture including programmable cores and HW components is designed first. The SW development including tests starts only after HW development. Moreover, the decisions, which parts of the specification are realized in HW and which parts in SW, are done manually
The design starts with a set of specifications and requirements on the functional and nonfunctional properties of the target system. The first step is to determine the appropriate algorithm to meet the functional specification if it is not given. Afterward, system architects typically determine a hardware architecture that would satisfy the functional requirements while optimizing the design objectives such as cost minimization and/or energy minimization. The decision is usually made based on the profiling information of the algorithms to be implemented and their computational complexity as well as resource requirements and constraints. It is typically influenced by past design experience of similar systems. How to partition the functionality into software and hardware components is also determined manually in this step.
After this HW/SW partitioning for the determined hardware architecture, two groups of engineers work independently to design and implement the hardware components and software components. The software group waits to finalize the design until a hardware prototype is made by the hardware group since the software usually contains hardware-dependent components. After the hardware prototype is built, the entire software that consists of the system software and the application software is ported. After porting is completed, the system undergoes testing and verification that checks whether the system satisfies the functional and nonfunctional requirements. It rarely happens that testing and verification succeeds at the first attempt. If a test fails, the causes of the failure need to be found, which is a difficult and tiresome task for all engineers involved in the design. If it turns out that the hardware architecture and HW/SW partitioning decisions need to be changed, it is required to go back to the starting point of the design loop to iterate the design process.
As the system complexity increases, the above traditional design flow faces several challenges. It is evident that the critical path in the design process becomes prohibitively long and costly in case multiple iterations of the sequential flow are performed from HW and SW development, software porting, and testing. And the design quality mostly depends on the expertise of the architect since the target architecture and HW/SW partitioning are decided manually.
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