Mohammad Almalkawi - RF and Microwave Module Level Design and Integration

The recent advances in microelectronics process and packaging technologies have enabled the integration of complex RF electronic systems on single chips as well as on compact size modules. Each application has different requirements, and there are many considerations to be taken into account when selecting the best packaging technology for a particular application. Knowing that the smallest possible package will always be the size of the chip itself, chipmakers are in a race to stay ahead of the competition by trying to achieve a small form factor packages close to the chip size as it directly impacts the business revenue. However, shrinking the chip size contributes significantly to its electrostatic discharge (ESD) sensitivity, limits its power handling capability, and exacerbates parasitic effects especially in passive devices. Moreover, the higher the chip pin count and the smaller pad pitch, the higher the possibility of unwanted EM coupling between them. In high precision performance devices, a small amount of unwanted coupling through the device package can lead to serious isolation problems between the input and output peripherals of the device. This is commonly feasible in the case of selective high precision bandpass filter designs [] where coupling can deteriorate the attenuation level at the out-of-band rejections resulting in a violation of design specifications and eventually a product yield loss. Therefore, it can be concluded that performance, cost, and size are the main market drivers in the radio-frequency integrated circuits (RFICs) domain.

Several packaging solutions have been developed for the semiconductor microelectronic devices either for chip or module level. The role of these packages is to provide enclosure or mechanical support necessary for transporting, handling, and assembling the device. Packaging is also needed to provide a heat transfer mechanism for better thermal performance, increase the lifetime of the product by protecting the semiconductor device from ionic contamination due to moisture paths and sources, and create electrical connections from a die component to the outside circuits. In general, packaging allows a higher level of component integration and depending on the technology in use it can lead to significant cost reduction in the case of mass production.

Another use of packages which may not appear of interest to the design engineers is packaging samples of each particular technology that are used to construct various mechanical samples referred to as silicon daisy chain (SDC) samples which are mainly used for mechanical and process equipment set-up and evaluation. This type of analysis allows packaging engineers to improve assembly processes and build good knowledge regarding possible causes of failures which in some way can be important information to the design engineers.

An RF module package enclosing multichips implemented using hybrid technologies can contain diverse material types such as semiconductors, high conductivity alloys, insulators, and organics. The selection of the packaging materials depends on multiple factors, for example, the package geometry, thermal expansion coefficient, thermal conductivity, and whether the required package is hermetic or nonhermetic. Packaging solutions for RF devices are available in two main categories in terms of the medium encapsulating a die component or a module. These two solutions include molded and air cavity packages. Depending on the medium in use and the design tolerance, its possible that the selection of encapsulating material may impact the device response. Materials with high moisture absorption rate can lead to what is called a popcorn effect when moisture collects and explodes in the assembly process. Additionally, lightweight and low-cost packaging solutions are usually made of polymeric materials rather than ceramic and/or glass. Such mold material comes into direct contact with the die whether a standalone die or serval dies in a module, and hence these polymeric materials exhibit a higher dielectric constant than air. Therefore, a molded package will experience higher parasitics that can limit the device performance and impact the ruggedness of the design. On the other side, a mold material can increase the thermal conductivity and aid as an additional path for heat transfer. From cost and process complexity perspective, a molded packaging solution is a preferred low cost and simple packaging option than air.

Sections 1.2.11.2.5 will discuss commonly used packaging technologies in the semiconductor industry and highlight their trade-offs when it comes to choosing the suitable packaging solution for a particular application.