Krishnendu Guha
A. K. Choudhury School of Information Technology (AKCSIT), University of Calcutta, Kolkata, West Bengal, India
Sangeet Saha
School of Computer Science and Electronic Engineering (CSEE), University of Essex, Colchester, UK
Amlan Chakrabarti
A. K. Choudhury School of Information Technology (AKCSIT), University of Calcutta, Kolkata, West Bengal, India
ISBN 978-3-030-79700-3 e-ISBN 978-3-030-79701-0
https://doi.org/10.1007/978-3-030-79701-0
The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerland AG 2021
This work is subject to copyright. All rights are solely and exclusively licensed by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed.
The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use.
The publisher, the authors and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, expressed or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
This Springer imprint is published by the registered company Springer Nature Switzerland AG
The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland
Preface
Security is of prime importance since times immemorial. However, the nature of security changes with the demand of industry. Industry 1.0 was associated with mechanization, steam power, weaving machines, etc., where the security objective was to prevent mechanical damage of system components. Industry 2.0 witnessed the use of electrical energy for mass production and distribution of products. Along with the security needs of Industry 1.0, the concept of securing the physical supply chain was a key aspect at this time. With Industry 3.0, the digital era started, where electronics and information technology were used to enhance automation. Though systems were automated, yet human input and intervention were needed. Security from intentional attacks gained importance in this era. However, the key focus was associated with software security and hardware was considered trusted. Presently, we are in Industry 4.0, which is the era of smart machines. This era features cyber-physical systems (CPSs) and internet of things (IoTs). With the aid of artificial intelligence (AI) and machine learning (ML), devices can communicate and interact with each other, trigger actions and even control one another without the aid of human support. To enhance speed of operations and eliminate attacks related to software, direct task execution on hardware was seen. However, on the flip side, the era has witnessed hardware threats. Thus, the security need in this domain is not only confined to software and network security but also hardware security.
Moreover, this era has witnessed the advent of field-programmable gate arrays (FPGAs) that are more flexible and replaces the traditional application-specific integrated circuits (ASICs), which are rigid. The property of dynamic partial reconfiguration of FPGAs facilitate spatial and temporal scheduling and execution of various tasks in the same platform. Thus, FPGAs find usage in a wide range of applications from simple smart home appliances to complex nuclear plants. As several user tasks with varied deadlines have to be executed in a certain interval of time, FPGA-based real-time task schedules are generated. Ensuring security for such FPGA-based real-time task schedules is of key importance. But like ASICs, real-time task operations in FPGAs can also be affected due to hardware attacks. Hence, security for real-time FPGA-based task operations is of utmost importance.
Hardware security is an arena that has been extensively researched for about two decades. This field gained significant momentum from 2005 when the US Government of Defence recognized hardware trojans as a significant threat to mission-critical applications. This arena was not only confined to research but has also been incorporated into various undergraduate and graduate courses. Moreover, with the cases of Meltdown and Spectre vulnerabilities in various microprocessors that are available in the electronics market, professionals who are associated with design and development of computing systems and their associated security have taken a keen interest in this arena of hardware security. However, the study on how hardware attacks may affect real-time task schedules is yet in its infancy. Not only detecting such vulnerability but also knowing the mechanisms of how such real-time task schedules can be protected from hardware attacks at runtime is of importance.
All species try to survive in nature and in this process, they exhibit a certain degree of self-awareness, based on which they counteract the various dangers and threats. Self-awareness (with respect to security) can be described as the ability of an individual to recognize itself in a complex environment, monitor or perceive the changes ongoing in the surrounding environment, decipher its course of action and finally, take an appropriate action to secure itself from the threat and survive in the environment. Based on this observe-decide-act mechanism, several on-chip self-aware security techniques were proposed in past works. However, the arena of self-aware security strategies that can secure real-time task schedules from hardware attacks is yet in its infancy and needs extensive study. Thus, the study of hardware security is incomplete, unless the effects of hardware attacks on real-time task schedules and its related self-aware security strategies are studied.
This book provides an extensive study on the latest FPGA-based scheduling strategies and how these can be affected due to hardware attacks. Along with these, self-aware security mechanisms for counteracting such threats at runtime are also presented in this book. This book will add on to the knowledge that are available in the existing books on real-time scheduling on reconfigurable hardware platforms and hardware security. This book will be useful to readers at all levels, be it students, research scholars, academicians or industry professionals, as it will serve to fill up the gaps in the existing knowledge on real-time scheduling on reconfigurable platforms and hardware security.